| r&s®compacttsvp | 
                              | 
                            1 slot required | 
                          
                          
                            | 
                              interfaces
                             | 
                          
                          
                            | control bus | 
                              | 
                            compactpci/pxi | 
                          
                          
                            | dut connector (front) | 
                              | 
                            2 × mini d ribbon (mdr) connectors  			2 × smb plug connectors | 
                          
                          
                            | rear i/o connector | 
                              | 
                            compactpci connector, 110 pins | 
                          
                          
                            | side connector | 
                            rs-485 | 
                            semtec terminal strips (2.54 mm) | 
                          
                          
                            | 
                              module features
                             | 
                          
                          
                            | 
                              front connectors
                             | 
                          
                          
                            | digital a/b | 
                            2 × mini d ribbon (mdr) connectors | 
                            2 × 8 lvdm data i/o channels  			2 × 1 lvdm general purpose i/o channels  			2 × 1 lvdm clock i/o channel  			2 × 2 lvttl digital i/o channels | 
                          
                          
                            | clk, trig | 
                            2 × smb connectors | 
                            1 clock i/o channel, 1 trigger i/o channel | 
                          
                          
                            | 
                              lvds channels (data input mode)
                             | 
                          
                          
                            | digital a/b | 
                              | 
                            2 × mdr connectors | 
                          
                          
                            | input modes | 
                            half-duplex operation | 
                            lvdm with termination 100 ω | 
                          
                          
                            | difference input voltage | 
                              | 
                            max. ±600 mv | 
                          
                          
                            | difference input threshold | 
                              | 
                            min. ±100 mv | 
                          
                          
                            | input resistance | 
                              | 
                            100 ω | 
                          
                          
                            | realtime acquisition | 
                            sample rate (sdr) | 
                            0.01 bit/s to 100 mbit/s (10 ns resolution) | 
                          
                          
                            |   | 
                            sample rate (ddr) | 
                            200 mbit/s (only for data channels) | 
                          
                          
                            | 
                              lvds channels (data output mode)
                             | 
                          
                          
                            | digital a/b | 
                              | 
                            2 × mdr connectors | 
                          
                          
                            | output modes | 
                            half-duplex operation | 
                            lvdm with termination 100 ω | 
                          
                          
                            | output voltage | 
                            |vod|, into 50 ω load (double termination) | 
                            247 mv (min.), 454 mv (max.) | 
                          
                          
                            | output current | 
                            ios | 
                            max. 10 ma | 
                          
                          
                            | tristate control | 
                              | 
                            programmable per channel and up to 50 mbit/s per sample | 
                          
                          
                            | realtime stimulation | 
                            sample rate (sdr) | 
                            0.01 bit/s to 100 mbit/s (10 ns resolution) | 
                          
                          
                            |   | 
                            sample rate (ddr) | 
                            200 mbit/s (only for data channels) | 
                          
                          
                            | 
                              ttl channels (input/output mode)
                             | 
                          
                          
                            | digital a/b | 
                              | 
                            2 × mdr connectors | 
                          
                          
                            | input/output mode | 
                            voltage | 
                            3.3 v logic; 10 kω pullup onboard | 
                          
                          
                            | realtime stimulation/acquisition | 
                            sample rate | 
                            0.01 bit/s to 50 mbit/s (10 ns resolution) | 
                          
                          
                            | connector | 
                            onboard connector | 
                            pin connector (terminal strips 2.54 mm) | 
                          
                          
                            | input/output mode | 
                              | 
                            rs-485/422 signal level, 10 bidirectional channels, no rs-485 serial protocol | 
                          
                          
                            | realtime stimulation/acquisition | 
                            sample rate | 
                            0.01 bit/s to 20 mbit/s with 10 ns resolution | 
                          
                          
                            | realtime stimulation/acquisition memory | 
                            data buffer depth/width (programmable) | 
                            2 m pattern at 32 bits (18 × lvds, 4 × ttl, 10 × rs-485) | 
                          
                          
                            | 
                              external clock
                             | 
                          
                          
                            | digital a/b | 
                            input/output voltage | 
                            according to lvds channels, 2 × mdr connectors | 
                          
                          
                            |   | 
                            frequency range | 
                            20 mhz to 50 mhz | 
                          
                          
                            | clk | 
                            input/output voltage | 
                            3.3 v ttl logic (smb plug) | 
                          
                          
                            |   | 
                            frequency range | 
                            20 mhz to 50 mhz | 
                          
                          
                            | 
                              trigger
                             | 
                          
                          
                            | trig | 
                            input/output voltage | 
                            3.3 v ttl logic (smb plug) | 
                          
                          
                            | pxi | 
                            input/output voltage | 
                            8 x pxi, 5 v ttl logic | 
                          
                          
                            | 
                              synchronization
                             | 
                          
                          
                            | trigger units | 
                            applications | 
                            2 x fully independent hardware trigger logic  			❙ programmable trigger generator  			❙ generation of realtime stimulation clock  			❙ generation of realtime acquisition clock  			❙ frequency measurement | 
                          
                          
                            | trigger unit characteristics | 
                            reference pattern | 
                            10-bit, 3 states: high, low, don’t care | 
                          
                          
                            |   | 
                            slope | 
                            positive/negative | 
                          
                          
                            |   | 
                            trigger delay setting | 
                            0 s to 100 s (10 ns resolution) | 
                          
                          
                            |   | 
                            output signals | 
                            ❙ trigger received signal (pulse)  			❙ trigger active signal (start of trigger until burst end)  			❙ sample pulse (pulse for each sample) | 
                          
                          
                            | synchronization inputs | 
                            channels | 
                            1 × ttl trigger (trig)  			8 × pxi trigger bus  			1 × pattern comparator | 
                          
                          
                            | synchronization outputs | 
                            channels | 
                            1 × ttl trigger (trig)  			8 × pxi trigger bus | 
                          
                          
                            |   | 
                            signals | 
                            ❙ output, trigger unit 1 (it1)  			❙ output, trigger unit 2 (it2)  			❙ ttl signal (trig) | 
                          
                          
                            | 
                              general data
                             | 
                          
                          
                            | 
                              environmental conditions
                             | 
                          
                          
                            | power consumption | 
                              | 
                            5 v: typ. 1 a, 3.3 v: typ. 1 a | 
                          
                          
                            | temperature | 
                            operating temperature range | 
                             5 °c to  40 °c | 
                          
                          
                            |   | 
                            storage temperature range | 
                            –10 °c to  60 °c | 
                          
                          
                            | damp heat | 
                              | 
                             40 °c, 80 % rel. humidity,  			steady state, in line with  			en 60068-2-30 | 
                          
                          
                            | 
                              mechanical resistance
                             | 
                          
                          
                            | vibration | 
                            sinusoidal | 
                            5 hz to 55 hz, 0.15 mm amplitude const.,  			55 hz to 150 hz, 0.5 g const.,  			in line with en 60068-2-6 | 
                          
                          
                            |   | 
                            random | 
                            10 hz to 300 hz, acceleration 1.2 g (rms),  			in line with en 60068-2-64 | 
                          
                          
                            | shock | 
                              | 
                            40 g shock spectrum,  			in line with mil-std-810e, method 516.4, procedure i | 
                          
                          
                            | 
                              product conformity
                             | 
                          
                          
                            | electromagnetic compatibility | 
                            eu: in line with  			emc directive 2014/30/ec | 
                            applied harmonized standards:  			en 61326-1: 2013 (industrial environment),  			en 61326-2-1: 2013,  			en 55011: 2009   a1: 2010 group 1, class a | 
                          
                          
                            | electrical safety | 
                            eu: in line with  			low voltage directive 2014/35/ec | 
                            applied harmonized standard:  			en 610110-1: 2010 | 
                          
                          
                            | dimensions | 
                            w × h × d | 
                            316 mm × 174 mm × 20 mm  			(12.4 in × 6.8 in × 0.8 in) | 
                          
                          
                            | weight | 
                              | 
                            0.21 kg (0.47 lb) |